Advanced Architectures (ADA)

• Official homepage (with schedule)

Description

The objective of the Advanced Architectures course is to provide a general vision of the issues that must be addressed in the design of high-performance architectures. The architecture of the general-purpose microprocessors ( instruction parallelism, pipeline, memory hierarchy, speculative execution, thread parallelism, ..) as well as the challenges for the design of next generation of processors will be presented. The second part of the module will address the design of specialized hardware platforms and architectures used in Systems on a Chip (SoC), that are ubiquitous in mobile and embedded computing. This part of the course will focus on three areas: the approaches and tools used for designing SoCs, the modeling and optimization of power consumption, and finally the design of specialized hardware accelerators.

Keywords

Processor architectures, specialized architectures

Prerequisites

Basics in processor architecture, compilation and systems

Course structure

Microarchitecture:

• Basic principles (instruction set, pipeline, VLIW instructional parallelism, superscalar, speculative execution, ..)
• Memory hierarchies
• Memory coherence

Systems on Chip (SoC) and hardware accelerators:

• Structure of a SoC: components, interconnection systems, etc.
• Methodologies and design techniques "low power"
• Synthesis of dedicated hardware accelerators (High Level Synthesis)

Acquired skills

Complexity of processors:

• why the running time of a program is not just its instruction number
• understand the design challenges of future processors

Broad view of synthesis and programming of hardware accelerators:

• which applications can be targeted by hardware accelerators
• what techniques should be used and developed for designing/programming hardware accelerators

Teachers

André Seznec (responsible), Steven Derrien, Caroline Collange